Challenges in high-speed system and SoC interconnects

Thanh Tran, Professor IN the practice

Today’s fastest interconnects of systems or SoCs run at data rates in the gigahertz range, and these fast switching signals can generate considerable noise and radiation which degrade system performance.  Maintaining good signal integrity of these signals is very challenging as traces interconnecting devices on a printed circuit board (PCB) become transmission lines and cause excessive insertion loss.  Methods of controlling system or SoC interconnects such as PCB stackups, controlled impedance routings, copper foil roughness, and s-parameters simulations will be discussed.

About Thanh:
Dr. Tran, Professor in the Practice in Electrical and Computer Engineering at Rice University, earned his B.S. in electrical engineering from University of Illinois at Urbana-Champaign and M.S. and Ph.D. in electrical engineering from University of Houston. Before joining Rice, he was an engineering technologist at Dell, a director of R&D at Earlens Corporation, and a director of electronics development at Physical Optics Corporation. He also served as Chief Technical Advisor of Halliburton Company and had held other technical leadership positions with Becton Dickinson Biosciences, Texas Instruments, and Compaq Computer (acquired by HP). In these positions, he led teams to develop medical instruments (flow cytometers and light-based hearing aids), high bitrate telemetry over copper wires and fiber optics, HD video conferencing, HDTV, smart grid, video and audio analytics, x86-based servers, and desktop/portable personal computers.
Dr. Tran, a Senior IEEE member, has authored one book and published over 24 technical papers. He is one of the pioneers in PC-Based HDTV, including computer video/audio, and is an expert in high speed system design for low noise and low electromagnetic interference.